Fundamental Logic Circuits

2-1

Chapter 2

Fundamental Logic Circuits

Learning Objectives

Upon completing this chapter, you should be able to do the following: 1. Identify general logic conditions, logic states, logic levels, and positive and negative logic as these terms and characteristics apply to the inputs and outputs of fundamental logic circuits. 2. Identify the following logic circuit gates and interpret and solve the associated Truth Tables: a. AND b. OR c. Inverters (NOT circuits) d. NAND e. NOR 3. Identify variations of the fundamental logic gates and interpret the associated Truth Tables. 4. Determine the output expressions of logic gates in combination.

5. Recognize the laws, theorems, and purposes of Boolean algebra.

Introduction

In chapter 1 you learned that the two digits of the binary number system can be represented by the state or condition of electrical or electronic devices. A binary 1 can be represented by a switch that is closed, a lamp that is lit, or a transistor that is conducting. Conversely, a binary 0 would be represented by the same devices in the opposite state: the switch open, the lamp off, or the transistor in cut-off. In this chapter you will study the four basic logic gates that make up the foundation for digital equipment. You will see the types of logic that are used in equipment to accomplish the desired results.

This chapter includes an introduction to Boolean algebra, the logic mathematics system used with digital equipment. Certain Boolean expressions are used in explanation of the basic logic gates, and their expressions will be used as each logic gate is introduced.

Computer Logic

Logic is defined as the science of reasoning. In other words, it is the development of a reasonable or logical conclusion based on known information. 2-2

General Logic

Consider the following example: If it is true that all Navy ships are gray and the USS Lincoln is a Navy ship, then you would reach the logical conclusion that the USS Lincoln is gray. To reach a logical conclusion, you must assume the qualifying statement is a condition of truth. For each statement there is also a corresponding false condition. The statement "USS Lincoln is a Navy ship" is true; therefore, the statement "USS Lincoln is not a Navy ship" is false. There are no in-between conditions. Computers operate on the principle of logic and use the TRUE and FALSE logic conditions of a logical statement to make a programmed decision.

The conditions of a statement can be represented by symbols (variables); for instance, the statement "Today is payday" might be represented by the symbol P. If today actually is payday, then P is TRUE. If today is not payday, then P is FALSE. As you can see, a statement has two conditions. In computers, these two conditions are represented by electronic circuits operating in two LOGIC STATES. These logic states are 0 (zero) and 1 (one). Respectively, 0 and 1 represent the FALSE and TRUE conditions of a statement. When the TRUE and FALSE conditions are converted to electrical signals, they are referred to as LOGIC LEVELS called HIGH and LOW. The 1 state might be represented by the presence of an electrical signal (HIGH), while the 0 state might be represented by the absence of an electrical signal (LOW).

If the statement "Today is payday" is FALSE, then the statement "Today is NOT payday" must be TRUE. This is called the COMPLEMENT of the original statement. In the case of computer math, complement is defined as the opposite or negative form of the original statement or variable. If today were payday, then the statement "Today is not payday" would be FALSE. The complement is shown by placing a bar, or VINCULUM, over the statement symbol (in this case, P ). This variable is spoken as NOT P. Table 2-1 shows this concept and the relationship with logic states and logic levels.

Table 2-1. ¾ Relationship of Digital Logic Concepts and Terms Example 1: Assume today is payday

Statement Symbol Condition Logic

STATE LOGIC LEVEL Original:

Today Is Payday

Pt R U E1 H I G H

Complement:

Today Is Not Payday P False 0 Low

Example 2: Assume today is not payday Original:

Today Is Not Payday

Pf A L S E0 L O W

Complement:

Today Is Not Payday P True 1 High

2-3 In some cases, more than one variable is used in a single expression. For example, the expression AB C D is spoken "A AND B AND NOT C AND D."

Positive And Negative Logic

To this point, we have been dealing with one type of LOGIC POLARITY, positive. Let’ s further define logic polarity and expand to cover in more detail the differences between positive and negative logic. Logic polarity is the type of voltage used to represent the logic 1 state of a statement. We have determined that the two logic states can be represented by electrical signals. Any two distinct voltages may be used. For instance, a positive voltage can represent the 1 state, and a negative voltage can represent the 0 state. The opposite is also true.

Logic circuits are generally divided into two broad classes according to their polarity ¾ positive logic and negative logic. The voltage levels used and a statement indicating the use of positive or negative logic will usually be specified on logic diagrams supplied by manufacturers. In practice, many variations of logic polarity are used; for example, from a high-positive to a low- positive voltage, or from positive to ground; or from a high-negative to a low-negative voltage, or from negative to ground. A brief discussion of the two general classes of logic polarity is presented in the following paragraphs.

Positive Logic Positive logic is defined as follows: If the signal that activates the circuit (the 1 state) has a voltage level that is more POSITIVE than the 0 state, then the logic polarity is considered to be POSITIVE. Table 2-2 shows the manner in which positive logic may be used. Table 2-2. —Examples of Positive Logic As you can see, in positive logic the 1 state is at a more positive voltage level than the 0 state. Negative Logic As you might suspect, negative logic is the opposite of positive logic and is defined as follows: If the signal that activates the circuit (the 1 state) has a voltage level that is more NEGATIVE than the 0 state, then the logic polarity is considered to be NEGATIVE. Table 2-3 shows the manner in which negative logic may be used.

2-4 Table 2-3.—Examples of Negative Logic NOTE: The logic level LOW now represents the 1 state. This is because the 1 state voltage is more negative than the 0 state. In the examples shown for negative logic, you notice that the voltage for the logic 1 state is more negative with respect to the logic 0 state voltage. This holds true in example 1 where both voltages are positive. In this case, it may be easier for you to think of the TRUE condition as being less positive than the FALSE condition. Either way, the end result is negative logic.

The use of positive or negative logic for digital equipment is a choice to be made by design engineers. The difficulty for the technician in this area is limited to understanding the type of logic being used and keeping it in mind when troubleshooting. NOTE:

Unless Otherwise Noted, The Remainder Of This Book Will Deal

Only With Positive Logic.

Logic Inputs And Outputs

As you study logic circuits, you will see a variety of symbols (variables) used to represent the inputs and outputs. The purpose of these symbols is to let you know what inputs are required for the desired output. If the symbol A is shown as an input to a logic device, then the logic level that represents A must be HIGH to activate the logic device. That is, it must satisfy the input requirements of the logic device before the logic device will issue the TRUE output. Look at view A of figure 2-1. The symbol X represents the input. As long as the switch is open, the lamp is not lit. The open switch represents the logic 0 state of variable X.

2-5 Figure 2-1. —Logic switch: A. Logic 0 state; B. Logic 1 state. Closing the switch (view B), represents the logic 1 state of X. Closing the switch completes the circuit causing the lamp to light. The 1 state of X satisfied the input requirement and the circuit therefore produced the desired output (logic HIGH); current was applied to the lamp causing it to light. If you consider the lamp as the output of a logic device, then the same conditions exist. The TRUE (1 state) output of the logic device is to have the lamp lit. If the lamp is not lit, then the output of the logic device is FALSE (0 state).

As you study logic circuits, it is important that you remember the state (1 or 0) of the inputs and outputs. So far in this chapter, we have discussed the two conditions of logical statements, the logic states representing these two conditions, logic levels and associated electrical signals and positive and negative logic. We are now ready to proceed with individual logic device operations. These make up the majority of computer circuitry. As each of the logic devices are presented, a chart called a TRUTH TABLE will be used to illustrate all possible input and corresponding output combinations. Truth Tables are particularly helpful in understanding a logic device and for showing the differences between devices.

The logic operations you will study in this chapter are the AND, OR, NOT, NAND, and NOR. The devices that accomplish these operations are called logic gates, or more informally, gates. These gates are the foundation for all digital equipment. They are the "decision-making" circuits of computers and other types of digital equipment. By making decisions, we mean that certain conditions must exist to produce the desired output. In studying each gate, we will introduce various mathematical SYMBOLS known as BOOLEAN ALGEBRA expressions. These expressions are nothing more than descriptions of the input requirements necessary to activate the circuit and the resultant circuit output.

2-6

The And Gate

The AND gate is a logic circuit that requires all inputs to be TRUE at the same time in order for the output to be TRUE.

Logic Symbol

The standard symbol for the AND gate is shown in figure 2-2. Variations of this standard symbol may be encountered. These variations become necessary to illustrate that an AND gate may have more than one input. Figure 2-2. —AND gate. If we apply two variables, A and B, to the inputs of the AND gate, then both A and B would have to be TRUE at the same time to produce the desired TRUE output. . The symbol f designates the output function. The Boolean expression for this operation is f = A·B or f = AB. The expression is spoken, "f = A AND B." The dot, or lack of, indicates the AND function.

And Gate Operation

We can demonstrate the operation of the AND gate with a simple circuit that has two switches in series as shown in figure 2-3. You can see that both switches would have to be closed at the same time to light the lamp (view A). Any other combination of switch positions (view B) would result in an open circuit and the lamp would not light (logic 0). Figure 2-3.—AND gate equivalent circuit: A. Logic 1 state; B. Logic 0 state. Now look at figure 2-4. Signal A is applied to one input of the AND gate and signal B to the other.

At time T0, both inputs are LOW (logic 0) and f is LOW. At T1, A goes HIGH (logic 1); B remains LOW; and as a result, f remains LOW. At T2, A goes LOW and B goes HIGH; f, however, is still LOW, because the proper input conditions have not been satisfied (A and B both HIGH at the same time). At T4, both A 2-7 and B are HIGH. As a result, f is HIGH. The input requirements have been satisfied, so the output is HIGH (logic 1). Figure 2-4. —AND gate input and output signals.

Truth Table

Now let’ s refer to figure 2-5. As you can see, a Truth Table and a Table of Combinations are shown. The latter is a deviation of the Truth Table. It uses the HIGH and LOW logic levels to depict the gate’ s inputs and resultant output combinations rather than the 1 and 0 logic states. By comparing the inputs and outputs of the two tables, you see how one can easily be converted to the other (remember, 1 = HIGH and 0 = LOW). The Table of Combinations is shown here only to familiarize you with its existence, it will not be seen again in this book. As we mentioned earlier, the Truth Table is a chart that shows all possible combinations of inputs and the resulting outputs. Compare the AND gate Truth Table (figure 2-5) with the input signals shown in figure 2-4.

Figure 2-5. —AND gate logic symbol, Truth Table, and Table of Combinations. 2-8 The first combination (A = 0, B = 0) corresponds to T0 in figure 2-4; the second to T1; the third to T2; and the last to T4. When constructing a Truth Table, you must include all possible combinations of the inputs, including the all 0s combination. A Truth Table representing an AND gate with three inputs (X, Y, and Z) is shown below. Remember that the two-input AND gate has four possible combinations, with only one of those combinations providing a HIGH output. An AND gate with three inputs has eight possible combinations, again with only one combination providing a HIGH output. Make sure you include all possible combinations. To check if you have all combinations, raise 2 to the power equal to the number of input variables. This will give you the total number of possible combinations. For example: EXAMPLE 1-AB = 22 = 4 combinations EXAMPLE 2-XYZ = 23 = 8 combinations XY Z f 00 0 0 00 1 0 01 0 0 01 1 0 10 0 0 10 1 0 11 0 0 11 1 1 f = XYZ As with all AND gates, all the inputs must be HIGH at the same time to produce a HIGH output.

Don’ t be confused if the complement of a variable is used as an input. When a complement is indicated as an input to an AND gate, it must also be HIGH to satisfy the input requirements of the gate. The Boolean expression for the output is formulated based on the TRUE inputs that give a TRUE output. Here is an adage that might help you better understand the AND gate: In order to produce a 1 output, all the inputs must be 1. If any or all of the inputs is/are 0, then the output will be 0. Referring to the following examples should help you cement this concept in your mind. Remember, the inputs, whether the original variable or the complement must be high in order for the output to be high. The three examples given are all AND gates with two inputs. Keep in mind the Boolean expression for the output is the result of all the inputs being HIGH.

2-9 Figure 2-5a. —AND gate logic with two inputs, Truth Table. You will soon be able to recognize the Truth Table for the other types of logic gates without having to look at the logic symbol. Q1. What is defined as "the science of reasoning?" Q2. With regard to computer logic circuits, what is meant by "complement?" Q3. What are the complements of the following terms? a. Q b. R c. V d. Z Q4. If logic 1 = -5 vdc and logic 0 = -10 vdc, what logic polarity is being used? Q5. If logic 1 = +2 vdc and logic 0 = -2 vdc, what logic polarity is being used?

Q6. If logic 1 = -5 vdc and logic 0 = 0 vdc, what logic polarity is being used? Q7. What is the Boolean expression for the output of an AND gate that has R and S as inputs? Q8. What must be the logic state of R and S to produce the TRUE output? Q9. How many input combinations exist for a four-input AND gate? 2-10

The Or Gate

The OR gate differs from the AND gate in that only ONE input has to be HIGH to produce a HIGH output. An easy way to remember the OR gate is that any HIGH input will yield a HIGH output.

Logic Symbol

Figure 2-6shows the standard symbol for the OR gate. The number of inputs will vary according to the needs of the designer. Figure 2-6. —OR gate. The OR gate may also be represented by a simple circuit as shown in figure 2-7. In the OR gate, two switches are placed in parallel. If either or both of the switches are closed (view A), the lamp will light. The only time the lamp will not be lit is when both switches are open (view B). Figure 2-7. —OR gate equivalent circuit: A. Logic 1 state; B. Logic 0 state. Let’ s assume we are applying two variables, X and Y, to the inputs of an OR gate. For the circuit to produce a HIGH output, either variable X, variable Y, or both must be HIGH. The Boolean expression for this operation is f = X+Y and is spoken "f equals X OR Y." The plus sign indicates the OR function and should not be confused with addition.

Or Gate Operation

Look at figure 2-8. At time T0, both X and Y are LOW and f is LOW. At T1, X goes HIGH producing a HIGH output. At T2 when both inputs go LOW, f goes LOW. When Y goes HIGH at T3, f 2-11 also goes HIGH and remains HIGH until both inputs are again LOW. At T5, both X and Y go HIGH causing f to go HIGH. Figure 2-8. —OR gate input and output signals.

Truth Table

Using the inputs X and Y, let’ s construct a Truth Table for the OR gate. You can see from the discussion of figure 2-8 that there are four combinations of inputs. List each of these combinations of inputs and the respective outputs and you have the Truth Table for the OR gate. XY f 000 011 101 111 f = X + Y When writing or stating the Boolean expression for an OR gate with more than two inputs, simply place the OR sign (+) between each input and read or state the sign as OR. For example, the Boolean expression for an OR gate with the inputs of A, B, C, and D would be: f = A+B+C+D This expression is spoken "f equals A OR B OR C OR D." You can substitute the complements for the original statements as we did with the AND gate or use negative logic; but for an output from an OR gate, at least one of the inputs must be TRUE.

2-12 Q10. Write the Boolean expression for an OR gate having G, K, and L as inputs. Q11. How many input combinations are possible using G, K, and L? Q12. How many of those combinations will produce a HIGH output?

The Inverter

The INVERTER, often referred to as a NOT gate, is a logic device that has an output opposite of the input. It is sometimes called a NEGATOR. It may be used alone or in combination with other logic devices to fulfill equipment requirements. When an inverter is used alone, it is represented by the symbol shown in figure 2-9 (view A). It will more often be seen in conjunction with the symbol for an amplifier (view B). Symbols for inverters used in combination with other devices will be shown later in the chapter. Figure 2-9. —Inverter: A. Symbol for inverter used alone; B. Symbol for an amplifier/inverter.

Let’ s go back to the statement "Today is payday." We stated that P represents the TRUE state. If we apply P to the input of the inverter as shown in figure 2-10, then the output will be the opposite of the input. The output, in this case, is P . At times T0 through T2, P is LOW. Consequently, the output (P ) is HIGH. At T2, P goes HIGH and as a result P goes LOW. P remains LOW as long as P is HIGH and vice versa. The Boolean expression for the output of this gate is f = P . 2-13 Figure 2-10. —Inverter input and resultant output.

You will recall that P is the complement of P. The Truth Table for an inverter is shown below. Pf 01 10 The output of an inverter will be the complement of the input. The following examples show various inputs to inverters and the resulting outputs: The vinculum, or NOT sign, is placed over the entire output or removed from the output, depending on the input. If we applied A B C to an inverter, the output would be CBA . And if we ran that output through another inverter, the output would be AB C 2-14 Q13. What is the complement of XYZ?

Q14. The input to an inverter is X+( Y Z ) . What is the output Q15. In a properly functioning circuit, can both the input and output of an inverter be HIGH at the same time?

The Nand Gate

The NAND gate is another logic device commonly found in digital equipment. This gate is simply an AND gate with an inverter (NOT gate) at the output.

Logic Symbol

The logic symbol for the NAND gate is shown in figure 2-11. Figure 2-11. —NAND gate. The NAND gate can have two or more inputs. The output will be LOW only when all the inputs are HIGH. Conversely, the output will be HIGH when any or all of the inputs are LOW. The NAND gate performs two functions, AND and NOT. Separating the NAND symbol to show these two functions would reveal the equivalent circuits depicted in figure 2-12. This should help you better understand how the NAND gate functions. Figure 2-12. —NAND gate equivalent circuit: A. Either X or Y or both are LOW; B. Both X and Y are HIGH.

2-15 Inputs X and Y are applied to the AND gate. If either X or Y or both are LOW (view A), then the output of the AND gate is LOW. A LOW (logic 0) on the input of the inverter results in a HIGH (logic 1) output. When both X and Y are HIGH (view B), the output of the AND gate is HIGH; thus the output of the inverter is LOW. The Boolean expression for the output of a NAND gate with these inputs is f =XY . The expression is spoken "X AND Y quantity NOT." The output of any NAND gate is the negation of the input. For example, if our inputs are X and Y , the output will be YX .

Nand Gate Operation

Now, let’ s observe the logic level inputs and corresponding outputs as shown in figure 2-13. At time T0, X and Y are both LOW. The output is HIGH; the opposite of an AND gate with the same inputs. At T1, X goes HIGH and Y remains LOW. As a result, the output remains HIGH. At T2, X goes LOW and Y goes HIGH. Again, the output remains HIGH. When both X and Y are HIGH at T4, the output goes LOW. The output will remain LOW only as long as both X and Y are HIGH. Figure 2-13. —NAND gate input and output signals.

Truth Table

The Truth Table for a NAND gate with X and Y as inputs is shown below. XY f 001 011 101 110 F = XY Q16. A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW? Q17. What must be the state of the inputs to a NAND gate in order to produce a LOW output? 2-16 Q18. What is the output Boolean expression for a NAND gate with inputs A, B , and C? Q19. A NAND gate has inputs labeled as A, B , and C. If A and B are HIGH, C must be at what logic level to produce a HIGH output?

The Nor Gate

As you might expect, the NOR gate is an OR gate with an inverter on the output.

Logic Symbol

The standard logic symbol for this gate is shown in figure 2-14. More than just the two inputs may be shown. Figure 2-14. —NOR gate. The NOR gate will have a HIGH output only when all the inputs are LOW. When broken down, the two functions performed by the NOR gate can be represented by the equivalent circuit depicted in figure 2-15. When both inputs to the OR gate are LOW, the output is LOW. A LOW applied to an inverter gives a HIGH output. If either or both of the inputs to the OR gate are HIGH, the output will be HIGH. When this HIGH output is applied to the inverter, the resulting output is LOW. The Boolean expression for the output of this NOR gate is f = KL+ . The expression is spoken, "K OR L quantity NOT." Figure 2-15. —NOR gate equivalent circuit.

Nor Gate Operation

The logic level inputs and corresponding outputs for a NOR gate are shown in figure 2-16. At time T0, both K and L are LOW; as a result, f is HIGH. At T1, K goes HIGH, L remains LOW, and f goes LOW. At T2, K goes LOW, L goes HIGH, and the output remains LOW. The output goes HIGH again at T3 when both inputs are LOW. At T4 when both inputs are HIGH, the output goes LOW and remains LOW until T5 when both inputs go LOW. Remember the output is just opposite of what it would be for an OR gate. 2-17 Figure 2-16. —NOR gate input and output signals.

Figure 2-16.—NOR gate input and output signals.

Truth Table

The Truth Table for a NOR gate with K and L as inputs is shown below. KL f 00 1 01 0 10 0 11 0 f = LK + Q20. How does a NOR gate differ from an OR gate? Q21. What will be the output of a NOR gate when both inputs are HIGH? Q22. What is the output Boolean expression for a NOR gate with R and T as inputs? Q23. In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

Variations Of Fundamental Gates

Now that you are familiar with fundamental logic gates, let’ s look at some variations of these gates that you may encounter. 2-18 Up to now you have seen inverters used alone or on the output of AND and OR gates. Inverters may also be used on one or more of the inputs to the logic gates. Take a look at the examples as discussed in the following paragraphs.

And/Nand Gate Variations

If we place an inverter on one input of a two-input AND gate, the output will be quite different from that of the standard AND gate. In figure 2-17, we have placed an inverter on the A input. When A is HIGH, the inverter makes it a LOW going into the AND gate. In order for the output to be HIGH, A would have to be LOW while B is HIGH, as shown in the Truth Table. If the inverter were on the B input, the output expression would then be f = A B . Figure 2-17. —AND gate with one inverted input. Now let’ s compare a NAND gate to an AND gate with an inverter on each input. Figure 2-18 shows these gates and the associated Truth Tables. With the NAND gate (view A), the output is HIGH when either or both inputs is/are LOW. The AND gate with inverters on each input (view B), produces a HIGH output only when both inputs are LOW. This comparison also points out the differences between the expressions f = A B (A AND B quantity NOT) and f = ¾fi¾ A B (NOT A AND NOT B).

Now, look over the Truth Tables for figures 2-17, 2-18, and 2-19; look at how the outputs vary with inverters in different positions. 2-19 Figure 2-18. —Comparison of NAND gate and AND gate with inverted inputs: A. NAND gate; B. AND gate with inverters on each input. Figure 2-19. —NAND gate with one inverted input.

Or/Nor Gate Variations

The outputs of OR and NOR gates may also be changed with the use of inverters. An OR gate with one input inverted is shown in figure 2-20. The output of this OR gate requires that A be LOW, B be HIGH, or both of these conditions existing at the same time in order to have a HIGH output. Since the A input is inverted, it must be LOW if B is LOW in order to produce a HIGH output. Therefore the output is f = A +B. 2-20 Figure 2-20. —OR gate with one inverted input. Figure 2-21compares a NOR gate (view A), to an OR gate with inverters on both inputs (view B), and shows the respective Truth Tables. The NOR gate will produce a HIGH output only when both inputs are LOW. The OR gate with inverted inputs produces a HIGH output with all input combinations EXCEPT when both inputs are HIGH. This figure also illustrates the differences between the expressions f = AB+ (A OR B quantity NOT) and f = A + B (NOT A OR NOT B).

Figure 2-21. —Comparison of NOR gate and OR gate with inverted inputs: A. NOR gate; B. OR gate with inverters on both inputs. As with the NAND gate, one or more inputs to NOR gates may be inverted. Figure 2-22 shows the result of inverting a NOR gate input. In this case, because of the inversion of the B input and the inversion of the output, the only time this gate will produce a HIGH output is when A is LOW and B is HIGH. The output Boolean expression for this gate is f = BA + , spoken “A OR NOT B quantity NOT.” 2-21 Figure 2-22. —NOR gate with one inverted input.

Table 2-4 illustrates AND, NOR, NAND, and OR gate combinations that produce the same output. You can see by the table that there is more than one way to achieve a desired output. Although the gates have only two inputs, the table can be extended to more than two inputs. 2-22 Table 2-4.—Equivalent AND and NOR, NAND and OR Gates Q24. What is the output Boolean expression for an AND gate with A and B as inputs when the B input is inverted? Q25. What is the equivalent logic gate of a two-input NAND gate with both inputs inverted?

2-23 Q26. What is the output Boolean expression for the following gates?

Logic Gates In Combination

When you look at logic circuit diagrams for digital equipment, you are not going to see just a single gate, but many combinations of gates. At first it may seem confusing and complex. If you interpret one gate at a time, you can work your way through any network. In this section, we will analyze several combinations of gates and then provide you with some practice problems. Figure 2-23 (view A) shows a simple combination of AND gates. The outputs of gates 1 and 2 are the inputs to gate 3. You already know that both inputs to an AND gate must be HIGH at the same time in order to produce a HIGH output.

2-24 Figure 2-23. —Logic gate combinations: A. Simple combination of AND gates; B. Simple combination of AND gates and OR gate. The output Boolean expression of gate 1 is RS, and the output expression of gate 2 is TV. These two output expressions become the inputs to gate 3. Remember, the output Boolean expression is the result of the inputs, in this case (RS)(TV); spoken "quantity R AND S AND quantity T AND V." In view B we have changed gate 3 to an OR gate. The outputs of gates 1 and 2 remain the same but the output of gate 3 changes as you would expect. The output of gate 3 is now (RS)+(TV); spoken "quantity R AND S OR quantity T AND V." In figure 2-24 (view A), the outputs of two OR gates are being applied as the input to third OR gate.

The output for gate 1 is R+S, and the output for gate 2 is T+V. With these inputs, the output expression of gate 3 is (R+S)+(T+V). 2-25 Figure 2-24. —Logic gate combinations: A. Simple combination of OR gates; B. Simple combination of OR gates and AND gate; C. Output expression without the parentheses. In view B, gate 3 has been changed to an AND gate. The outputs of gates 1 and 2 do not change, but the output expression of gate 3 does. In this case, the gate 3 output expression is (R+S)(T+V). This expression is spoken, "quantity R OR S AND quantity T OR V." The parentheses are used to separate the input terms and to indicate the AND function. Without the parentheses the output expression would read R+ST+V, which is representative of the circuit in view C. As you can see, this is not the same circuit as the one depicted in view B. It is very important that the Boolean expressions be written and spoken correctly.

The Truth Table for the output expression of gate 3 (view B) will help you better understand the output. When studying this Truth Table, notice that the only time f is HIGH (logic 1) is when either or both R and S AND either or both T and V are HIGH (logic 1). 2-26 RSTVf 00000 00010 00100 00110 01000 01011 01101 01111 10000 10011 10101 10111 11000 11011 11101 11111 f = (R+S) (T+V) Now let’ s determine the output expression for the NOR gate in figure 2-25. First write the outputs of gates 1, 2, and 3: Figure 2-25. —Logic gate combinations.

Since all three outputs are applied to gate 4, proceed as you would for any NOR gate. We separate each input to gate 4 with an OR sign (+) and then place a vinculum over the entire expression. The output expression of gate 4 is: 2-27 When you are trying to determine the outputs of logic gates in combination, take them one gate at a time! Now write the output expressions for the following logic gate combinations: Q27. Q28. Q29. 2-28 Q30. Q31. Q32.

Boolean Algebra

Boolean logic, or Boolean algebra as it is called today, was developed by an English mathematician, George Boole, in the 19th century. He based his concepts on the assumption that most quantities have two possible conditions ¾ TRUE and FALSE. This is the same theory you were introduced to at the beginning of this chapter. Throughout our discussions of fundamental logic gates, we have mentioned Boolean expressions. A Boolean expression is nothing more than a description of the input conditions necessary to get the desired output. These expressions are based on Boole’ s laws and theorems.

PURPOSE Boolean algebra is used primarily by design engineers. Using this system, they are able to arrange logic gates to accomplish desired tasks. Boolean algebra also enables the engineers to achieve the desired output by using the fewest number of logic gates. Since space, weight, and cost are important factors in the design of equipment, you would usually want to use as few parts as possible. 2-29 Figure 2-26 (view A), shows a rather complex series of gates. Through proper application of Boolean algebra, the circuit can be simplified to the single OR gate shown in view B. Figure 2-27 shows the simplification process and the Boolean laws and theorem used to accomplish it.

Figure 2-26. —Logic simplification: A. Complex series of gates; B. Simplified single OR gate. 2-30 Figure 2-27. —Logic circuit simplification process.

Laws And Theorems

Each of the laws and theorems of Boolean algebra, along with a simple explanation, is listed below. LAW OF IDENTITY ¾ a term that is TRUE in one part of an expression will be TRUE in all parts of the expression (A = A or A = A). 2-31 COMMUTATIVE LAW ¾ the order in which terms are written does not affect their value (AB = BA, A+B = B+A). ASSOCIATIVE LAW ¾ a simple equality statement A(BC) = ABC or A+(B+C) = A+B+C. IDEMPOTENT LAW ¾ a term ANDed with itself or ORed with itself is equal to that term (AA = A, A+A = A). DOUBLE NEGATIVE LAW ¾ a term that is inverted twice is equal to the term A = A.

COMPLEMENTARY LAW ¾ a term ANDed with its complement equals 0, and a term ORed with its complement equals 1 (AA = 0, A+ A = 1). LAW OF INTERSECTION ¾ a term ANDed with 1 equals that term and a term ANDed with 0 equals 0 (A·1 = A, A·0 = 0). LAW OF UNION ¾ a term ORed with 1 equals 1 and a term ORed with 0 equals that term (A+1 = 1, A+0 = A). DeMORGAN’S THEOREM ¾ this theorem consists of two parts: (1) AB = A + B and (2) BA + = A · B (Look at the fourth and eighth sets of gates in table 2-4). DISTRIBUTIVE LAW ¾ (1) a term (A) ANDed with an parenthetical expression (B+C) equals that term ANDed with each term within the parenthesis: A·(B+C) = AB+AC; (2) a term (A) ORed with a parenthetical expression ( B ·C) equals that term ORed with each term within the parenthesis: A+(BC) = (A+B) · (A+C).

LAW OF ABSORPTION ¾ this law is the result of the application of several other laws: A·(A+B) = A or A+(AB) = A. LAW OF COMMON IDENTITIES ¾ the two statements A·(A +B) = AB and A+ A B = A+B are based on the complementary law. 2-32 Table 2-5. —Boolean Laws and Theorems If you wish a more detailed study of Boolean algebra, we suggest you obtain Mathematics, Volume 3, NAVEDTRA 10073-A1. Q33. Boolean algebra is based on the assumption that most quantities have _______ conditions. Q34. Boolean algebra is used primarily by _______ to simplify circuits.

SUMMARY This chapter has presented information on logic, fundamental logic gates, and Boolean laws and theorems. The information that follows summarizes the important points of this chapter. LOGIC is the development of a logical conclusion based on known information. Computers operate on the assumption that statements have two conditions ¾ TRUE and FALSE. 2-33 POSITIVE LOGIC is defined as follows: If the signal that activates the circuit (the 1 state) has a voltage level that is more POSITIVE than the 0 state, then the logic polarity is considered to be

Positive.

NEGATIVE LOGIC is defined as follows: If the signal that activates the circuit (the 1 state) has a voltage level that is more NEGATIVE than the 0 state, then the logic polarity is considered to be

Negative.

In DIGITAL LOGIC (positive or negative), the TRUE condition of a statement is represented by the logic 1 state and the FALSE condition is represented by the logic 0 state. LOGIC LEVELS High and LOW represent the voltage levels of the two logic states. Logic level HIGH represents the more positive voltage while logic level LOW represents the less positive (more negative) voltage. In positive logic, the HIGH level corresponds to the TRUE or 1 state and the LOW level corresponds to the FALSE or 0 state. In negative logic, the HIGH level corresponds to the FALSE or 0 state and the LOW level corresponds to the TRUE or 1 state.

A BOOLEAN EXPRESSION is a statement that represents the inputs and outputs of logic gates. The AND GATE requires all inputs to be HIGH at the same time in order to produce a HIGH output. The OR GATE requires one or both inputs to be HIGH in order to produce a HIGH output. INVERTER (NOT function or negator) is a logic gate used to complement the state of the input variable; that is, a 1 becomes a 0 or a 0 becomes a 1. It may be used on any input or output of any gate to obtain the desired result. 2-34 The NAND GATE functions as an AND gate with an inverted output.

The NOR GATE functions as an OR gate with an inverted output. When deriving the output Boolean expression of a combination of gates, solve one gate at a time. Boolean algebra is used primarily for the design and simplification of circuits.

Answers To Questions Q1. Through Q34.

A1. Logic. A2. The opposite of the original statement. A3. a. , b. , c. , d. A4. Positive. A5. Positive. A6. Negative. A7. f = RS. A8. Both must be 1s (HIGH) at the same time. 2-35 A9. 16. A10. f = G+K+L. A11. Eight. A12. Seven. A13. XYZ A14. X + (YZ). A15. No.

A16. High.

A17. All inputs must be HIGH. A18. CBA A19. Low. A20. It has an inverter on the output. A21. Low. A22. TR + A23. All inputs must be low.

A24. A B .

A25. OR gate. A26. a. TR + b. L K c. G F d. G F +

A27. (Abc)(De).

A28. (ABC)+(DE). A29. (R+S+T) (X+Y+Z). A30. (R+S+T)+(X+Y+Z). A31. ( JK )( NM + ). 2-36 A32. (AB) (M + N) ( YX + ). A33. Two. A34. Design engineers.